sponsored byACMIEEE The International Conference for High Performance 
Computing, Networking, Storage and Analysis
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SCHEDULE: NOV 15-20, 2015

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Finding the Limits of Power-Constrained Application Performance

SESSION: Power-Constrained Computing


EVENT TAG(S): Power, Performance

TIME: 4:00PM - 4:30PM

SESSION CHAIR(S): Karen L. Karavanic

AUTHOR(S):Peter E. Bailey, Aniruddha Marathe, David K. Lowenthal, Barry Rountree, Martin Schulz



As we approach exascale systems, power is turning from an optimization
goal to a critical constraint. With power bounds imposed by both
stakeholders and the limitations of existing infrastructure, we need
new techniques that extract maximum performance from limited power. In
this paper, we find the theoretical upper bound of computational
performance on a per-application basis in hybrid MPI + OpenMP
applications. We use a linear programming formulation to optimize
application schedules under various power constraints, where a
schedule consists of a DVFS state and number of OpenMP threads. We
also provide a mixed integer-linear formulation and show that the
resulting schedules closely match schedules from the LP
formulation. Across applications, we use our LP-derived upper bounds
to show that current approaches trail optimal, power-constrained
performance by up to 41.1%. Our LP formulation provides future
optimization approaches with a quantitative optimization target.

Chair/Author Details:

Karen L. Karavanic (Chair) - Portland State University|

Peter E. Bailey - University of Arizona

Aniruddha Marathe - University of Arizona

David K. Lowenthal - University of Arizona

Barry Rountree - Lawrence Livermore National Laboratory

Martin Schulz - Lawrence Livermore National Laboratory

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Paper provided by the ACM Digital Library

Paper also available from IEEE Computer Society