sponsored byACMIEEE The International Conference for High Performance 
Computing, Networking, Storage and Analysis
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SCHEDULE: NOV 15-20, 2015

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Emulating In-Memory Data Rearrangement for HPC Applications

SESSION: Regular & ACM Student Research Competition Poster Reception

EVENT TYPE: Posters, Receptions, ACM Student Research Competition

EVENT TAG(S): HPC Beginner Friendly, Regular Poster

TIME: 5:15PM - 7:00PM

SESSION CHAIR(S): Michela Becchi, Manish Parashar, Dorian C. Arnold

AUTHOR(S):Christopher W. Hajas, G. Scott Lloyd, Maya B. Gokhale

ROOM:Level 4 - Lobby


As bandwidth requirements for scientific applications continue to increase, new and novel memory architectures to support these applications are required. The Hybrid Memory Cube is a high-bandwidth memory architecture containing a logic layer with stacked DRAM. The logic layer aids the memory transactions; however, additional custom logic functions to perform near-memory computation are the subject of various research endeavors.

We propose a Data Rearrangement Engine in the logic layer to accelerate data-intensive, cache unfriendly applications containing irregular memory accesses by minimizing DRAM latency through the coalescing of disjoint memory accesses. Using a custom FPGA emulation framework, we found 1.4x speedup on a Sparse-Matrix, Dense-Vector benchmark (SpMV). We investigated the multi-dimensional parameter space to achieve maximum speedup and determine optimal cache invalidation and memory access coalescing schemes on various sizes/densities of matrices.

Chair/Author Details:

Michela Becchi, Manish Parashar, Dorian C. Arnold (Chair) - University of Missouri|Rutgers University|University of New Mexico|

Christopher W. Hajas - University of Florida

G. Scott Lloyd - Lawrence Livermore National Laboratory

Maya B. Gokhale - Lawrence Livermore National Laboratory

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