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SCHEDULE: NOV 15-20, 2015
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MCDRAM (High Bandwidth Memory) on Knights Landing - Analysis Methods/Tools
SESSION: MCDRAM (High Bandwidth Memory) on Knights Landing - Analysis Methods/Tools
EVENT TYPE: Tutorials
EVENT TAG(S): Performance, Architectures
TIME: 8:30AM - 12:00PM
Presenter(s):Christopher Cantalupo, Karthik Raman, Ruchira Sasanka
ROOM:18A
ABSTRACT:
The Intel’s next generation Xeon Phi™ processor family x200 product (Knights Landing) brings in new memory technology, a high bandwidth on package memory called Multi-Channel DRAM (MCDRAM) in addition to the traditional DDR4. MCDRAM is a high bandwidth (~4x more than DDR4), low capacity (up to 16GB) memory, packaged with the Knights Landing Silicon. MCDRAM can be configured as a third level cache (memory side cache) or as a distinct NUMA node (allocatable memory) or somewhere in between. With the different memory modes by which the system can be booted, it becomes very challenging from a software perspective to understand the best mode suitable for an application. At the same time, it is also very essential to utilize the available memory bandwidth in MCDRAM efficiently without leaving any performance on the table. Our tutorial will cover some methods/tools users can exploit to analyze the suitable memory mode for an application. In addition it will also cover the use the “memkind” library interface which is basically a user extensible heap manager built on top of jemalloc. This enables the users to change their application memory allocations to the high bandwidth MCDRAM as opposed to the standard DDR4.
Chair/Presenter Details:
Christopher Cantalupo - Intel Corporation
Karthik Raman - Intel Corporation
Ruchira Sasanka - Intel Corporation
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