SC15 Austin, TX

Contech: Parallel Program Representation and High Performance Instrumentation

Student: Brian P. Railing (Georgia Institute of Technology)
Advisor: Thomas M. Conte (Georgia Institute of Technology)
Abstract: This summary of my dissertation work explores a pair of problems: how can a parallel program's execution be comprehensively represented? How would this representation be efficiently generated from the program's execution? I demonstrated that the behavior and structure of a shared-memory parallel program can be characterized by a task graph that encodes the instructions, memory accesses, and dependencies of each component of parallel work. The task graph representation can encode the actions of any threading library and is agnostic to the target architecture. Subsequently, I developed an open source, LLVM-based instrumentation framework, Contech, for generating dynamic task graphs from arbitrary parallel programs. The Contech framework supports a variety of languages, parallelization libraries, and architectures, with an average instrumentation overhead of less than 3x. Various analyses have been applied to Contech task graphs, including modeling a parallel, reconfigurable architecture.

Summary: pdf
Presentation: pdf
Poster: pdf

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