Characterizing Memory Throttling Using Processor and Memory Performance
Authors: Bo Li (Virginia Polytechnic Institute and State University), Edgar A. Leon (Lawrence Livermore National Laboratory), Kirk W. Cameron (Virginia Polytechnic Institute and State University)
Abstract: Memory bandwidth is one of the most important factors contributing to the performance of many HPC applications. Characterizing their sensitivity to this resource may help application and system developers understand the performance tradeoffs when running on multiple systems with different memory characteristics. In this work, we use memory throttling as a means to analyze the impact of the memory system on the performance of applications. We make two contributions. First, we characterize memory throttling in terms of the roofline model of performance. This shows that with throttling we can emulate different memory systems. Second, by identifying the pattern between memory bandwidth utilization of an application and the maximum amount of throttling without affection performance (optimal), we propose an accurate model for predicting the optimal throttling for a given code region. This model can be employed to balance power between components on a power-limited system.
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