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Computing, Networking, Storage and Analysis
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SCHEDULE: NOV 15-20, 2015

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Adaptive and Transparent Cache Bypassing for GPUs

SESSION: GPU Memory Management

EVENT TYPE: Papers, Best Student Paper Finalists, Best Paper Finalists

EVENT TAG(S): Accelerators

TIME: 1:30PM - 2:00PM

SESSION CHAIR(S): Ana Lucia Varbanescu

AUTHOR(S):Ang Li, Gert-Jan van den Braak, Akash Kumar, Henk Corporaal



GPUs have recently emerged to be widely adopted for gener-al-purpose applications. To capture on-chip locality for these applications, modern GPUs have integrated multi-level cache hierarchy, in an attempt to reduce the amount and latency of the massive and sometimes irregular memory accesses. However, inferior performance are frequently attained due to the serious congestion in the caches results from the huge volume of concurrent threads. In this paper, we propose a novel compiler and runtime framework for adaptive and transparent cache bypassing on GPUs. It uses a simple yet effective approach to control the bypass degree so as to match the size of applications' runtime footprints. We validate the design on several GPUs from different generations using 16 cache sensitive applications. Experiment measures show that our design can significantly improve overall performance (up to 2.16x on average). Besides, we summarize some optimization guidelines regarding GPU caches based on the experiment figures.

Chair/Author Details:

Ana Lucia Varbanescu (Chair) - University of Amsterdam|

Ang Li - Eindhoven University of Technology

Gert-Jan van den Braak - Eindhoven University of Technology

Akash Kumar - Dresden University of Technology

Henk Corporaal - Eindhoven University of Technology

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Paper provided by the ACM Digital Library

Paper also available from IEEE Computer Society